Oded Maler

Verimag

Time: Thursday, 27.11.2003, 13.30-16.00
Place: room C3-204, Fredrik Bajersvej 7

Verification for dummies

In this talk I will explain the principles underlying formal verification of discrete event systems. Starting from an example coming from everyday life, I will show how automaton models can be used for simulation, verification and controller synthesis for such systems. The talk will conclude with some hints on how to extend this methodology toward continuous systems defined by differential equations.