Time: Thursday, May 1, 14.30-15.30
Place: C3-204
We present a new approach, Connectivity Testing, for testing embedded systems. Instead of testing the conformance of a system against its specification, which often turns out to be infeasible, we suggest to test only the composition of the software and the hardware. We assume the software to be correct so only the hardware component may be erroneous. Our framework is based on the notion of a (single fault) fault model, that is a model which formally captures errors in the interface between the hardware and the software. In this talk we only consider input fault models. An exhaustive test suite for a fault model is a test suite that detects the faults of the model with 100% coverage. The problem of computing a smallest exhaustive test suite turns out to be NP-hard so we devise a heuristic polynomial time algorithms computing minimal exhaustive test suites. We have carried out experiments with the algorithm implemented using Binary Decision Diagrams. Test generation from specifications containing more than 4.98 * 10^10 states have been carried out.